1. Field of the Invention
The present invention relates to a semiconductor device with a Selective Epitaxial Growth (SEG) layer and a method of isolation in the device, and the invention particularly relates to a semiconductor device which achieves high integration and high density via formation of an active region by SEG of monocrystalline silicon in an open area formed at an insulating layer of the device.
2. Description of the Prior Art
Demand for highly integrated and dense semiconductor devices which include large numbers of extremely small devices is increasing rapidly. Conventionally, the local oxidation silicon (LOCOS) method is commonly used to isolate elements on a wafer. However, this approach suffers a drawback in that it experiences narrowing of active regions, commonly referred to as the xe2x80x9cbird""s beakxe2x80x9d phenomenon. In order to overcome this drawback, the processes of polysilicon layer buffered (PLB), side wall masked isolation (SWAMI), shallow trench isolation (STI) and others have been suggested. These methods can solve the problem of the LOCOS method to a certain degree, but they have certain limitations, such as high complexity and the requirement of a more detailed design rule.
U.S. Pat. Nos. 5,821,145 and 5,780,343 disclose a method for isolating elements by a selective epitaxial growth (SEG) process. The method disclosed in these patents for isolating elements through the SEG process includes forming an open area at an insulating layer and then forming the active region by selective epitaxial growth of silicon in the open area. This method satisfies the highly detailed design rule, and the process is relatively simple.
However, the crystalline structure of the epitaxial layer is determined by the quality of a seed layer produced before the epitaxial layer. Therefore, the characteristics of the crystalline structure can vary according to conditions before and after the epitaxial process. The characteristics of the crystalline structure in turn can determine the characteristics of the elements to be formed in the device.
U.S Pat. No. 5,780,343 discloses various models of pre-process steps in this SEG process and the difference in the characteristics of elements of each model. In certain cases in which a side wall of an open area is formed in a straight fashion with vertical walls in an insulating layer, the insulating layer is stressed at the time of the epitaxial growth. Also, after the epitaxial growth, the characteristics of the elements can be affected adversely by surface lattice defects.
It is an object of the present invention to provide an approach to isolating elements of a semiconductor device, in which stresses induced in an insulating layer by SEG are reduced and void regions between the insulating layer and a silicon substrate are eliminated.
Another object of the present invention is to provide a method for isolating elements of a semiconductor device which can acquire an epitaxial layer of high quality by removing lattice defects on the surface of the epitaxial layer.
In one embodiment of the invention, the stresses in the insulating layer are reduced by etching the open area in the insulating layer with side walls having a positive angle of inclination. Also, in one embodiment, the surface defects on the epitaxial layer are removed by forming a sacrificial oxide layer on the surface of the epitaxial layer after the SEG process and then removing the sacrificial oxide layer.
In one aspect, the present invention is directed to a method for isolating elements in a semiconductor device. In accordance with the method of the invention, an insulating layer for isolating elements is formed on a silicon substrate. An open area exposing the surface of the silicon substrate is formed by selectively etching the insulating layer, such that a side wall of the insulating layer has a positive angle of inclination. An epitaxial layer is selectively grown having a surface at a height lower than a height of a surface of the insulating layer using the silicon exposed in the open area as a seed. A sacrificial oxide layer is formed on the surface of the silicon of the epitaxial growth, and the sacrificial oxide layer is then removed.
In one particular embodiment, the positive angle of inclination in the side wall of the open area is greater than 70xc2x0 and less than 90xc2x0.
The device of the present invention includes a silicon semiconductor substrate over which is formed an isolating layer. The isolating layer includes an open area formed in the isolating layer. The open are includes at least one side wall having a positive angle of inclination. The device also includes an epitaxial layer grown from the silicon semiconductor substrate in the open area and formed on the isolating layer. The epitaxial layer provides an active region for producing an active element.